A receiver may sample incoming data symbols at some phase of a sampling clock generated by a phase-locked loop (PLL). The PLL uses a reference clock to produce the sampling clock. The edge transitions between incoming data symbols may be recovered using the sampling clock. To properly sample the incoming data symbols, the receiver needs to sample the incoming data symbols at a sampling phase, also referred to as a sampling position, between the edge transitions in the stream of incoming data symbols. The range of sampling positions for which the receiver properly recovers the incoming data symbols gives the margin for the sampling position.
To check the margin of the sampling position, external test equipment may inject jitter into the signal sent to the receiver. The range of magnitudes of the injected jitter for which the receiver properly recovers the data symbols may give the margin of the sampling position. To check that the data symbols actually captured by the receiver match the data symbols that the external test equipment transmits to the receiver, the captured data symbols need to be looped back to the external test equipment. It is time-consuming and difficult to determine the margin of the sampling position because external test equipment is required and because the tested receiver must generally include a transmitter supporting a loopback mode for returning the actually captured data symbols back to the external test equipment.
Accordingly, it would be desirable and useful to provide an improved way of characterizing receivers.